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Issue Date
Title
Author(s)
2015-08-24
Design of auxiliary simulator for analysing the deadlock occurrence using Banker's algorithm
Kasthuriarachchi, K. T. S
;
Rajapaksha, S. K
2018-08-08
Use of utility based interestingness measures to predict the academic performance of technology learners in Sri Lanka
Kasthuriarachchi, K. T. S
;
Liyanage, S. R
2016-01-11
Design of Auxiliary Simulator for Analyzing the Deadlock Occurrence using Banker’s Algorithm
Rajapakshe, U. U. S. K
;
Kasthuriarachchi, K. T. S
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Author
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Liyanage, S. R
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Rajapaksha, S. K
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Rajapakshe, U. U. S. K
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analysing
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auxiliary simulator
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Banker's algorithm
2
deadlock occurrence
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Design
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Sri Lanka
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