Please use this identifier to cite or link to this item:
https://rda.sliit.lk/handle/123456789/936
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Perera, R. | - |
dc.contributor.author | Premasiri, S. | - |
dc.date.accessioned | 2022-02-03T05:57:07Z | - |
dc.date.available | 2022-02-03T05:57:07Z | - |
dc.date.issued | 2017-01-26 | - |
dc.identifier.issn | 1800-3591 | - |
dc.identifier.uri | http://rda.sliit.lk/handle/123456789/936 | - |
dc.description.abstract | This paper proposes a simple but effective way of implementing important pre-processing and Morphological operations on real-time video frames using a Field Programmable Gate Array (FPGA) that may be also found useful in any image processing application. Although many software based algorithms are already available, faster performances are required for real-time applications. The techniques concentrated in this paper involves FPGA based implementations of gray scaling, binarization, erosion, dilation, sobel edge detection and image resizing. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Faculty of Graduate Studies and Research | en_US |
dc.relation.ispartofseries | Vol.6; | - |
dc.subject | Image processing | en_US |
dc.subject | FPGA based systems | en_US |
dc.subject | Morphological operations | en_US |
dc.title | Hardware implementation of essential pre-processing & Morphological Operations in Image Processing | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/NCTM.2017.7872843 | en_US |
Appears in Collections: | Proceedings of the 6th National Conference on Technology & Management - NCTM 2017 Research Papers - IEEE |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
07872843.pdf Until 2050-12-31 | 225.8 kB | Adobe PDF | View/Open Request a copy |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.