Browsing by Author "Rajapakshe, U. U. S. K"

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    Design of Auxiliary Simulator for Analyzing the Deadlock Occurrence using Banker’s Algorithm
    (IEEE, 2016-01-11) Rajapakshe, U. U. S. K; Kasthuriarachchi, K. T. S
    Once the necessary inputs are given, the tool will display the matrix including the total allocation, initial available resource amounts and the safe sequence. Therefore, this visualization tool can be used to demonstrate the behavior of Banker's algorithm for deadlock avoidance in operating system. The users will be able to practice this as a learning tool for both classroom and individual usage.