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Please use this identifier to cite or link to this item: https://rda.sliit.lk/handle/123456789/2371
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dc.contributor.authorRajapakshe, U. U. S. K-
dc.contributor.authorKasthuriarachchi, K. T. S-
dc.date.accessioned2022-05-18T05:35:21Z-
dc.date.available2022-05-18T05:35:21Z-
dc.date.issued2016-01-11-
dc.identifier.citationK. T. S. Kasthuriarachchi and U. U. S. K. Rajapaksha, "Design of auxiliary simulator for analysing the deadlock occurrence using Banker's algorithm," 2015 Fifteenth International Conference on Advances in ICT for Emerging Regions (ICTer), 2015, pp. 265-265, doi: 10.1109/ICTER.2015.7377698.en_US
dc.identifier.isbn978-1-4673-9441-3-
dc.identifier.urihttp://rda.sliit.lk/handle/123456789/2371-
dc.description.abstractOnce the necessary inputs are given, the tool will display the matrix including the total allocation, initial available resource amounts and the safe sequence. Therefore, this visualization tool can be used to demonstrate the behavior of Banker's algorithm for deadlock avoidance in operating system. The users will be able to practice this as a learning tool for both classroom and individual usage.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.relation.ispartofseries(IEEE) International Conference on Advances in ICT for Emerging Regions;-
dc.subjectDesignen_US
dc.subjectauxiliary simulatoren_US
dc.subjectanalysingen_US
dc.subjectdeadlock occurrenceen_US
dc.subjectBanker's algorithmen_US
dc.titleDesign of Auxiliary Simulator for Analyzing the Deadlock Occurrence using Banker’s Algorithmen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/ICTER.2015.7377698en_US
Appears in Collections:Research Papers - IEEE
Research Papers - SLIIT Staff Publications
Research Publications -Dept of Information Technology

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