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https://rda.sliit.lk/handle/123456789/2371| Title: | Design of Auxiliary Simulator for Analyzing the Deadlock Occurrence using Banker’s Algorithm |
| Authors: | Rajapakshe, U. U. S. K Kasthuriarachchi, K. T. S |
| Keywords: | Design auxiliary simulator analysing deadlock occurrence Banker's algorithm |
| Issue Date: | 11-Jan-2016 |
| Publisher: | IEEE |
| Citation: | K. T. S. Kasthuriarachchi and U. U. S. K. Rajapaksha, "Design of auxiliary simulator for analysing the deadlock occurrence using Banker's algorithm," 2015 Fifteenth International Conference on Advances in ICT for Emerging Regions (ICTer), 2015, pp. 265-265, doi: 10.1109/ICTER.2015.7377698. |
| Series/Report no.: | (IEEE) International Conference on Advances in ICT for Emerging Regions; |
| Abstract: | Once the necessary inputs are given, the tool will display the matrix including the total allocation, initial available resource amounts and the safe sequence. Therefore, this visualization tool can be used to demonstrate the behavior of Banker's algorithm for deadlock avoidance in operating system. The users will be able to practice this as a learning tool for both classroom and individual usage. |
| URI: | http://rda.sliit.lk/handle/123456789/2371 |
| ISBN: | 978-1-4673-9441-3 |
| Appears in Collections: | Research Papers - IEEE Research Papers - SLIIT Staff Publications Research Publications -Dept of Information Technology |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Design_of_auxiliary_simulator_for_analysing_the_deadlock_occurrence_using_Bankers_algorithm.pdf Until 2050-12-31 | 88.52 kB | Adobe PDF | View/Open Request a copy |
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